Sensing circuits may be used for sensing contents of memory cells. In particular, such circuits may be used for sensing a content of low power non-volatile memories.
Memory cells, in particular non-volatile memory devices, use charge storages for example on a MOS transistor gate to indicate the presence of a logic value “1” or “0”. The distinction between these two states may be sensed by observing a current which passes through the memory transistor, when it is connected to a supply voltage. The magnitude of the current is determined by the charge stored on the polarised gate of the memory transistor. Over time and use, the current observed for each state may change so that the current difference between the two states gets closer together. Therefore, the content of a memory cell may be sensed by a sensing circuit, e.g. a sense amplifier.
Such a sense amplifier makes a decision of a logic value “1” or “0” when a given memory bit, i.e. a transistor with a polarized gate, is connected by means of an address selection logic, that means word lines and bit lines, etc. Since the sensing of a logical value stored in the memory cell is undertaken by observing the current when a voltage is applied, there is a measurable power drain from the supply of the sensing circuit. If the sensing circuit is not managed properly, the drain may be a constant power drain so that a difference between stored values may not be sensed.
US 2002/0152365 A1 discloses a memory device having memory cells for storing data. The memory device described is distinguished by the fact that a current switch-off device is provided, which prevents an existing current flow through the memory cell to be read in response to the identification of the memory cell content, and/or that a discharge device is provided, which partly discharges again a node in the memory cell which is to be precharged before the memory cell is read.
However, during sensing of a content of a memory cell, it may still happen that the difference between stored values may not be sensed properly.